All Stories

  1. Power macromodeling technique and its application to SoC-based design

    Article • International Journal of Numerical Modelling Electronic Networks Devices and Fields, October 2016, Wiley

    Dr. Yaseer A Durrani

  2. Efficient Power Analysis Approach and its Application to System-on-Chip Design

    Article • Microprocessors and Microsystems, September 2016, Elsevier

    Dr. Yaseer A Durrani

  3. Power analysis approach and its application to IP-based SoC design

    Article • COMPEL The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, May 2016, Emerald

    Dr. Yaseer A Durrani

  4. Evaluation of Titanium Nitride-Modified Bondcoat System Used in Thermal Barrier Coating in Corrosive Salts Environment at High Temperature

    Article • Journal of Thermal Spray Technology, November 2015, Springer Science + Business Media

    Dr. Yaseer A Durrani

  5. Power estimation for intellectual property-based digital systems at the architectural level

    Article • Journal of King Saud University - Computer and Information Sciences, September 2014, Elsevier

    Dr. Yaseer A Durrani

  6. High-Level Power Analysis for Intellectual Property-Based Digital Systems

    Article • Journal of Low Power Electronics, December 2013, American Scientific Publishers

    Dr. Yaseer A Durrani

  7. High-Level Power Analysis for Intellectual Property-Based Digital Systems

    Article • Circuits Systems and Signal Processing, November 2013, Springer Science + Business Media

    Dr. Yaseer A Durrani

  8. Power Analysis for Deep Submicrometer Conventional MOS Transistors

    Article • Journal of Engineering and Computer Sciences, January 2013, Al Manhal FZ, LLC

    Dr. Yaseer A Durrani

  9. Power Macro Modelling for CMOS Inverter of 0.12 um Technology

    Article • January 2013, Atlantis Press

    Dr. Yaseer A Durrani

  10. Efficient power macromodeling technique for conventional MOS transistors

    Article • July 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Yaseer A Durrani

  11. Power estimation technique for deep submicrometer conventional MOS transistors

    Article • June 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Yaseer A Durrani

  12. Accurate power estimation technique for DSP architectures

    Article • July 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Yaseer A Durrani

  13. Architectural power macromodeling technique for DSP architectures

    Article • April 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Yaseer A Durrani

  14. Power estimation technique for DSP architectures

    Article • Digital Signal Processing, March 2009, Elsevier

    Dr. Yaseer A Durrani

  15. LUT-Based Power Macromodeling Technique for DSP Architectures

    Article • December 2007, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Yaseer A Durrani

  16. Architectural Power Analysis for Intellectual Property-Based Digital System

    Article • Journal of Low Power Electronics, December 2007, American Scientific Publishers

    Dr. Yaseer A Durrani

  17. Architectural Power Estimation Technique for IP-Based System-on-Chip

    Article • June 2007, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Yaseer A Durrani

  18. High-level power estimation for digital system

    Article • May 2007, SPIE

    Dr. Yaseer A Durrani

  19. Efficient Power Macromodeling Technique for IP-Based Digital System

    Article • May 2007, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Yaseer A Durrani

  20. Power Macromodeling for IP Modules

    Article • December 2006, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Yaseer A Durrani

  21. Power Estimation for IP-Based Modules

    Article • November 2006, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Yaseer A Durrani

  22. Statistical Power Estimation for IP-Based Design

    Article • November 2006, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Yaseer A Durrani