All Stories

  1. Graphite: Hardware-Aware GNN Reshaping for Acceleration With GPU Tensor Cores
  2. RoTA: Rotational Torus Accelerator for Wear Leveling of Neural Processing Elements
  3. Genie Cache: Non-Blocking Miss Handling and Replacement in Page-Table-Based DRAM Cache
  4. Nona: Accurate Power Prediction Model Using Neural Networks
  5. NeuroSpector: Systematic Optimization of Dataflow Scheduling in DNN Accelerators
  6. LAS: Locality-Aware Scheduling for GEMM-Accelerated Convolutions in GPUs
  7. NOMAD: Enabling Non-blocking OS-managed DRAM Cache via Tag-Data Decoupling
  8. SnakeByte: A TLB Design with Adaptive and Recursive Page Merging in GPUs
  9. The Nebula Benchmark Suite: Implications of Lightweight Neural Networks
  10. Thread-Aware Area-Efficient High-Level Synthesis Compiler for Embedded Devices
  11. Hardware accelerator systems for embedded systems
  12. Duplo: Lifting Redundant Memory Accesses of Deep Neural Networks for GPU Tensor Cores
  13. Energy-Efficient Acceleration of Deep Neural Networks on Realtime-Constrained Embedded Edge Devices
  14. FineReg: Fine-Grained Register File Management for Augmenting GPU Throughput
  15. Processor heterogeneity options for power-performance efficiency
  16. Reliability-performance tradeoffs between 2.5D and 3D-stacked DRAM processors
  17. Amdahl's law for lifetime reliability scaling in heterogeneous multicore processors
  18. KitFox: Multiphysics Libraries for Integrated Power, Thermal, and Reliability Simulations of Multicore Microarchitecture
  19. Temperature regulation in multicore processors using adjustable-gain integral controllers
  20. Architectural Reliability: Lifetime Reliability Characterization and Management ofMany-Core Processors
  21. Managing performance-reliability tradeoffs in multicore processors
  22. Control Principles and On-Chip Circuits for Active Cooling Using Integrated Superlattice-Based Thin-Film Thermoelectric Devices
  23. Power Modeling for GPU Architectures Using McPAT
  24. Energy Introspector: A parallel, composable framework for integrated power-reliability-thermal modeling for multicore architectures
  25. Manifold: A parallel simulation framework for multicore systems
  26. Post-Silicon Characterization and On-Line Prediction of Transient Thermal Field in Integrated Circuits Using Thermal System Identification
  27. Enhancements to FPMIPv6 for improved seamless vertical handover between LTE and heterogeneous access networks
  28. Throughput regulation in multicore processors via IPA
  29. A power capping controller for multicore processors
  30. Thermal system identification (TSI): A methodology for post-silicon characterization and prediction of the transient thermal field in multicore chips
  31. SST: A Scalable Parallel Framework for Architecture-Level Performance, Power, Area and Thermal Simulation
  32. A framework for architecture-level power, area, and thermal simulation and its application to network-on-chip design exploration
  33. Improvements to seamless vertical handover between mobile WiMAX and 3GPP UTRAN through the evolved packet core