All Stories

  1. An Analytical Solution for Transient Electromigration Stress in Multisegment Straight-line Interconnects Based on a Stress-wave Model
  2. Invited: Toward an ML EDA Commons: Establishing Standards, Accessibility, and Reproducibility in ML-driven EDA Research
  3. Towards Designing and Deploying Ising Machines
  4. Performance Analysis of CNN Inference/Training with Convolution and Non-Convolution Operations on ASIC Accelerators
  5. Analyzing the Impact of FinFET Self-Heating on the Performance of RF Power Amplifiers
  6. Generative Methods in EDA: Innovations in Dataset Generation and EDA Tool Assistants
  7. IR-Aware ECO Timing Optimization Using Reinforcement Learning
  8. Hardware Acceleration of Inference on Dynamic GNNs
  9. An Open-Source ML-Based Full-Stack Optimization Framework for Machine Learning Accelerators
  10. A Machine Learning Approach to Improving Timing Consistency between Global Route and Detailed Route
  11. On Endurance of Processing in (Nonvolatile) Memory
  12. The ALIGN Automated Analog Layout Engine
  13. Recent Progress in the Analysis of Electromigration and Stress Migration in Large Multisegment Interconnects
  14. A Generalized Methodology for Well Island Generation and Well-Tap Insertion in Analog/Mixed-Signal Layouts
  15. Performance-driven Wire Sizing for Analog Integrated Circuits
  16. Encoder-Decoder Networks for Analyzing Thermal and Power Delivery Networks
  17. A Novel Semi-Analytical Approach for Fast Electromigration Stress Analysis in Multi-Segment Interconnects
  18. Energy-efficient and Reliable Inference in Nonvolatile Memory under Extreme Operating Conditions
  19. Physically Accurate Learning-based Performance Prediction of Hardware-accelerated ML Algorithms
  20. From Global Route to Detailed Route: ML for Fast and Accurate Wire Parasitics and Timing Prediction
  21. Analog/Mixed-Signal Layout Optimization using Optimal Well Taps
  22. Spiking Neural Networks in Spintronic Computational RAM
  23. CAMeleon
  24. Machine Learning Techniques in Analog Layout Automation
  25. A customized graph neural network model for guiding analog IC placement
  26. PIMBALL
  27. Stress-Induced Performance Shifts in 3D DRAMs
  28. ALIGN
  29. True In-memory Computing with the CRAM
  30. Strain-aware performance evaluation and correction for OTFT-based flexible displays
  31. Control synthesis and delay sensor deployment for efficient ASV designs
  32. Optimal design of JPEG hardware under the approximate computing paradigm
  33. Joint precision optimization and high level synthesis for approximate computing