All Stories

  1. Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)

    Article • International Journal of Reconfigurable Computing, November 2019, Hindawi Publishing Corporation

    Roberto Giorgi

  2. Scalable embedded computing through reconfigurable hardware: Comparing DF-Threads, cilk, openmpi and jump

    Article • Microprocessors and Microsystems, November 2018, Elsevier

    Roberto Giorgi

  3. Rapid prototyping IoT solutions based on Machine Learning

    Article • September 2017, ACM (Association for Computing Machinery)

    Roberto Giorgi

  4. Exploring dataflow-based thread level parallelism in cyber-physical systems

    Article • May 2016, ACM (Association for Computing Machinery)

    Roberto Giorgi

  5. A matrix multiplier case study for an evaluation of a configurable dataflow-machine

    Article • May 2015, ACM (Association for Computing Machinery)

    Roberto Giorgi

  6. The TERAFLUX Project: Exploiting the DataFlow Paradigm in Next Generation Teradevices

    Article • September 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  7. Embedded reconfigurable architectures

    Article • October 2012, ACM (Association for Computing Machinery)

    Roberto Giorgi

  8. TERAFLUX

    Article • May 2012, ACM (Association for Computing Machinery)

    Roberto Giorgi

  9. A Fault Detection and Recovery Architecture for a Teradevice Dataflow System

    Article • October 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  10. Early results from ERA — Embedded Reconfigurable Architectures

    Article • July 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  11. TERAFLUX: Exploiting Tera-device Computing Challenges

    Article • Procedia Computer Science, January 2011, Elsevier

    Antoni Portero, Roberto Giorgi

  12. A multi-pronged approach to benchmark characterization

    Article • September 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  13. Exploiting locality to improve leakage reduction in embedded drowsy I-caches at same area/speed

    Article • May 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  14. Programming Abstractions and Toolchain for Dataflow Multithreading Architectures

    Article • June 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  15. Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture

    Article • May 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  16. Introducing Hardware TLP Support in the Cell Processor

    Article • March 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  17. Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture

    Article • January 2009, Springer Science + Business Media

    Roberto Giorgi

  18. Filtering drowsy instruction cache to achieve better efficiency

    Article • March 2008, ACM (Association for Computing Machinery)

    Roberto Giorgi

  19. Special track on Embedded Systems: Applications, Solutions, and Techniques

    Article • March 2008, ACM (Association for Computing Machinery)

    Roberto Giorgi

  20. Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture

    Article • January 2008, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  21. Effects of Instruction-Set Extensions on an Embedded Processor: A Case Study on Elliptic Curve Cryptography over GF(2/sup m/)

    Article • IEEE Transactions on Computers, January 2008, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  22. Reducing Leakage through Filter Cache

    Article • January 2008, Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  23. Multi-level Parallelism in the Computational Modeling of the Heart

    Article • October 2007, Institute of Electrical & Electronics Engineers (IEEE)

    Rafael Sachetto , Roberto Giorgi

  24. Reducing leakage in power-saving capable caches for embedded systems by using a filter cache

    Article • September 2007, ACM (Association for Computing Machinery)

    Roberto Giorgi

  25. Editorial message for the special track on embedded systems

    Article • March 2005, ACM (Association for Computing Machinery)

    Roberto Giorgi

  26. Reducing coherence overhead and boosting performance of high-end SMP multiprocessors running a DSS workload

    Article • Journal of Parallel and Distributed Computing, March 2005, Elsevier

    Roberto Giorgi

  27. A workload characterization of elliptic curve cryptography methods in embedded environments

    Article • January 2003, ACM (Association for Computing Machinery)

    Roberto Giorgi

  28. Process Migration Effects on Memory Performance of Multiprocessor Web-Servers

    Article • January 1999, Springer Science + Business Media

    Roberto Giorgi

  29. A Performance Evaluation of ARM ISA Extension for Elliptic Curve Cryptography over Binary Finite Fields

    Article • Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi

  30. A workload generation environment for trace-driven simulation of shared-bus multiprocessors

    Article • Institute of Electrical & Electronics Engineers (IEEE)

    Roberto Giorgi