All Stories

  1. Clockless Spin-based Look-Up Tables with Wide Read Margin
  2. AQuRate
  3. Composable Probabilistic Inference Networks Using MRAM-based Stochastic Neurons
  4. HSC-FPGA
  5. Logic-Encrypted Synthesis for Energy-Harvesting-Powered Spintronic-Embedded Datapath Design
  6. Low-Energy Deep Belief Networks Using Intrinsic Sigmoidal Spintronic-based Probabilistic Neurons
  7. Self-Organized Sub-bank SHE-MRAM-based LLC: An energy-efficient and variation-immune read and write architecture
  8. Synthesis of normally-off boolean circuits: An evolutionary optimization approach utilizing spintronic devices
  9. Survivability Modeling and Resource Planning for Self-Repairing Reconfigurable Device Fabrics
  10. Voltage-Based Concatenatable Full Adder Using Spin Hall Effect Switching
  11. Radiation-hardened MRAM-based LUT for non-volatile FPGA soft error mitigation with multi-node upset tolerance
  12. Heterogeneous Technology Configurable Fabrics for Field-Programmable Co-Design of CMOS and Spin-Based Devices
  13. Energy-Efficient and Process-Variation-Resilient Write Circuit Schemes for Spin Hall Effect MRAM Device
  14. Heterogeneous energy-sparing reconfigurable logic: spin-based storage and CNFET-based multiplexing
  15. A Tunable Majority Gate-Based Full Adder Using Current-Induced Domain Wall Nanomagnets
  16. Scalable Adaptive Spintronic Reconfigurable Logic Using Area-Matched MTJ Design
  17. Energy-Efficient Nonvolatile Reconfigurable Logic using Spin Hall Effect-based Lookup Tables
  18. A Parity-Preserving Reversible QCA Gate with Self-Checking Cascadable Resiliency
  19. Adaptive Mitigation of Radiation-Induced Errors and TDDB in Reconfigurable Logic Fabrics
  20. Reactive rejuvenation of CMOS logic paths using self-activating voltage domains
  21. Designing a fuzzy logic controller for a quadruped robot using human expertise extraction
  22. Digitizing and Remediating Engineering Assessments: An Immersive and Transportable Faculty Development Workshop