All Stories

  1. SpikeNAS: A Fast Memory-Aware Neural Architecture Search Framework for Spiking Neural Network-Based Embedded AI Systems
  2. Energy-Efficient Continual Learning in Embedded AI with Timestep Optimization and Compressed Replay
  3. SpiKernel: A Kernel Size Exploration Methodology for Improving Accuracy of the Embedded Spiking Neural Network Systems
  4. Continual Learning With Neuromorphic Computing: Foundations, Methods, and Emerging Applications
  5. EnforceSNN: Enabling resilient and energy-efficient spiking neural network inference considering approximate DRAMs for embedded systems
  6. Fault-Tolerant Accelerators for Spiking Neural Networks
  7. SparkXD: A Framework for Resilient and Energy-Efficient Spiking Neural Network Inference using Approximate DRAM
  8. SpikeDyn: A Framework for Energy-Efficient Spiking Neural Networks with Continual and Unsupervised Learning Capabilities in Dynamic Environments
  9. ReSpawn: Energy-Efficient Fault-Tolerance for Spiking Neural Networks considering Unreliable Memories
  10. Towards Energy-Efficient and Secure Edge AI: A Cross-Layer Framework ICCAD Special Session Paper
  11. Q-SpiNN: A Framework for Quantizing Spiking Neural Networks
  12. ROMANet: Fine-Grained Reuse-Driven Off-Chip Memory Access Management and Data Organization for Deep Neural Network Accelerators
  13. FSpiNN: An Optimization Framework for Memory-Efficient and Energy-Efficient Spiking Neural Networks
  14. DRMap: A Generic DRAM Data Mapping Policy for Energy-Efficient Processing of Convolutional Neural Networks
  15. A Low Latency and Resource Efficient Scalable RSA Cryptoprocessor Architecture
  16. Cloud System Design using AMQP Protocol for Smart Devices System Applications
  17. APNAS: Accuracy-and-Performance-Aware Neural Architecture Search for Neural Hardware Accelerators
  18. HW/SW co-design and co-optimizations for deep learning
  19. Robust Machine Learning Systems: Reliability and Security for Deep Neural Networks
  20. Noise and Bandwidth Consideration in Designing Op-Amp Based Transimpedance Amplifier for VLC
  21. An Inter-Processor Communication (IPC) Data Sharing Architecture in Heterogeneous MPSoC for OFDMA
  22. Reversed-Trellis Tail-Biting Convolutional Code (RT-TBCC) Decoder Architecture Design for LTE
  23. Physical layer design with analog front end for bidirectional DCO-OFDM visible light communications
  24. Design of low power mobile application for Smart Home
  25. Visible light communication system for wearable patient monitoring device
  26. An architecture design of SAD based template matching for fast queue counter in FPGA
  27. Analog filters design in VLC analog front-end receiver for reducing indoor ambient light noise
  28. Kurtosis and energy based spectrum detection for SDR based RF monitoring system
  29. Live demonstration: MINDS — Meshed and internet networked devices system for smart home: Track selection: Embedded systems
  30. Parallel morphological template matching design for efficient human detection application
  31. Rapid Prototyping Methodology of Lightweight Electronic Drivers for Smart Home Appliances
  32. VLSI Architecture for Configurable and Low-Complexity Design of Hard-Decision Viterbi Decoding Algorithm
  33. Prototyping design of electronic end-devices for smart home applications
  34. Prototyping design of mechanical based end-devices for smart home applications
  35. Hybrid multi System-on-Chip architecture: A rapid development design for high-flexibility system
  36. Optimized hardware algorithm for integer cube root calculation and its efficient architecture
  37. Smart home platform based on optimized wireless sensor network protocol and scalable architecture
  38. The refined mCBE algorithm for efficient constants multipliers architecture
  39. A register-free and homogenous architecture for square root algorithm
  40. A configurable and low complexity hard-decision viterbi decoder in VLSI architecture
  41. A novel fixed-point square root algorithm and its digital hardware design
  42. VLSI design of parallel sorter based on modified PCM algorithm and Batcher's odd-even mergesort
  43. A New RTL Design Approach for a DCT/IDCT-Based Image Compression Architecture using the mCBE Algorithm
  44. The efficient mCBE algorithm and quantization numbers for multiplierless and low complexity DCT/IDCT Image Compression Architecture