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  1. High throughput DLP and mixed radix based architectures of Viterbi decoder

    Article • Microprocessors and Microsystems, September 2025, Elsevier

    MOHAMED ASAN BASIRI M

  2. Efficient VLSI implementations of singular value decomposition

    Article • The Journal of Supercomputing, May 2025, Springer Science + Business Media

    MOHAMED ASAN BASIRI M

  3. High Throughput Instruction-Data Level Parallelism Based Arithmetic Hardware Accelerator

    Article • International Journal of Parallel Programming, February 2025, Springer Science + Business Media

    MOHAMED ASAN BASIRI M

  4. Efficient VLSI Architectures of Convolution based DWT using Bit Accumulation

    Article • Journal of Signal Processing Systems, February 2025, Springer Science + Business Media

    MOHAMED ASAN BASIRI M

  5. Low Cost and High Throughput VLSI Architectures of Folded and Parallel Sorters

    Article • Circuits Systems and Signal Processing, December 2024, Springer Science + Business Media

    MOHAMED ASAN BASIRI M

  6. An Efficient FPGA Implementation of Wiener Filter

    Article • December 2024, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  7. Low Latency VLSI Architecture of Histogram Equalization of Images

    Article • September 2024, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  8. Guarded Low Power Hardware Implementations

    Article • December 2023, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  9. Efficient FPGA Implementations of Convolutional Neural Network

    Article • December 2023, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  10. High Performance Multicore Implementation of Motion Picture Estimation

    Article • December 2023, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  11. Efficient hardware implementations of Lopez–Dahab projective co-ordinate based scalar multiplication of ECC

    Article • Analog Integrated Circuits and Signal Processing, August 2023, Springer Science + Business Media

    MOHAMED ASAN BASIRI M

  12. Efficient FPGA Implementations of Lifting based DWT using Partial Reconfiguration

    Article • January 2023, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  13. An Efficient VLSI Architecture of Recurrent Neural Network

    Article • November 2022, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  14. Versatile Architectures of Artificial Neural Network with Variable Capacity

    Article • Circuits Systems and Signal Processing, July 2022, Springer Science + Business Media

    MOHAMED ASAN BASIRI M

  15. Efficient VLSI architecture of 3D discrete transformation

    Article • Integration, January 2022, Elsevier

    MOHAMED ASAN BASIRI M

  16. High Throughput Folded Architecture of AES

    Article • December 2021, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  17. Versatile Circuit Designs of Digital Modulator and Demodulator

    Article • December 2021, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  18. Hardware based Entropy Calculation in Crypto Applications

    Article • December 2021, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  19. Hardware based Order Book Design in High Frequency Algo Trading

    Article • December 2021, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  20. Efficient VLSI architectures of lifting based 3D discrete wavelet transform

    Article • IET Computers & Digital Techniques, August 2020, the Institution of Engineering and Technology (the IET)

    MOHAMED ASAN BASIRI M

  21. Reconfigurable Hardware Design for Polynomial Galois Field Arithmetic Operations

    Article • July 2020, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  22. LFSR based versatile divider architectures for BCH and RS error correction encoders

    Article • Microprocessors and Microsystems, November 2019, Elsevier

    MOHAMED ASAN BASIRI M

  23. Formal Hardware Verification of InfoSec Primitives

    Article • July 2019, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  24. Asynchronous hardware implementations for crypto primitives

    Article • Microprocessors and Microsystems, February 2019, Elsevier

    MOHAMED ASAN BASIRI M

  25. Low power hardware implementations for network packet processing elements

    Article • Integration, June 2018, Elsevier

    MOHAMED ASAN BASIRI M

  26. Discrete Orthogonal Multi-transform on Chip (DOMoC)

    Article • Journal of Signal Processing Systems, January 2018, Springer Science + Business Media

    MOHAMED ASAN BASIRI M

  27. An Efficient VLSI Architecture for Convolution Based DWT Using MAC

    Article • January 2018, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  28. Flexible VLSI architectures for Galois field multipliers

    Article • Integration, September 2017, Elsevier

    MOHAMED ASAN BASIRI M

  29. Quadruple Throughput Fixed Point Quarter Precision Multiply Accumulate Circuit

    Article • IET Computers & Digital Techniques, April 2017, the Institution of Engineering and Technology (the IET)

    MOHAMED ASAN BASIRI M, SREEHARI VEERAMACHANENI

  30. Flexible Composite Galois Field $$GF((2^m)^2)$$ Multiplier Designs

    Article • January 2017, Springer Science + Business Media

    MOHAMED ASAN BASIRI M

  31. High Performance Integer DCT Architectures for HEVC

    Article • January 2017, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  32. An efficient VLSI architecture for lifting based 1D/2D discrete wavelet transform

    Article • Microprocessors and Microsystems, November 2016, Elsevier

    MOHAMED ASAN BASIRI M

  33. Multi-mode parallel and folded VLSI architectures for 1D-fast Fourier transform

    Article • Integration, September 2016, Elsevier

    MOHAMED ASAN BASIRI M

  34. Hardware optimizations for crypto implementations (Invited paper)

    Article • May 2016, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  35. High speed multiplexer design using tree based decomposition algorithm

    Article • Microelectronics Journal, May 2016, Elsevier

    MOHAMED ASAN BASIRI M

  36. An Efficient VLSI Architecture for Discrete Hadamard Transform

    Article • January 2016, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  37. Configurable Folded IIR Filter Design

    Article • IEEE Transactions on Circuits & Systems II Express Briefs, December 2015, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  38. An Efficient Hardware-Based Higher Radix Floating Point MAC Design

    Article • ACM Transactions on Design Automation of Electronic Systems, November 2014, ACM (Association for Computing Machinery)

    SREEHARI VEERAMACHANENI, MOHAMED ASAN BASIRI M

  39. An efficient hardware based MAC design in digital filters with complex numbers

    Article • February 2014, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  40. Multiplication acceleration through quarter precision wallace tree multiplier

    Article • February 2014, Institute of Electrical & Electronics Engineers (IEEE)

    MOHAMED ASAN BASIRI M

  41. High Precision and High Speed Handheld Scientific Calculator Design Using Hardware based CORDIC Algorithm

    Article • Procedia Engineering, January 2013, Elsevier

    MOHAMED ASAN BASIRI M