All Stories

  1. Revisiting VerilogEval: A Year of Improvements in Large-Language Models for Hardware Code Generation
  2. Invited Paper: LLM4HWDesign Contest: Constructing a Comprehensive Dataset for LLM-Assisted Hardware Code Generation with Community Efforts
  3. PyHDL-Eval: An LLM Evaluation Framework for Hardware Design Using Python-Embedded DSLs
  4. RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Model
  5. Hierarchical Analog and Mixed-Signal Circuit Placement Considering System Signal Flow
  6. ELight: Toward Efficient and Aging-Resilient Photonic In-Memory Neurocomputing
  7. Interactive Analog Layout Editing With Instant Placement and Routing Legalization
  8. SqueezeLight: A Multi-Operand Ring-Based Optical Neural Network With Cross-Layer Scalability
  9. Tutorial and Perspectives on MAGICAL: A Silicon-Proven Open-Source Analog IC Layout System
  10. A Tale of EDA's Long Tail: Long-Tailed Distribution Learning for Electronic Design Automation
  11. RobustAnalog: Fast Variation-Aware Analog Circuit Design Via Multi-task RL
  12. A timing engine inspired graph neural network model for pre-routing slack prediction
  13. ADEPT
  14. “So Close, yet So Far”: Exploring Sexual-minority Women’s Relationship-building via Online Dating in China
  15. Automating Analog Constraint Extraction: From Heuristics to Learning: (Invited Paper)
  16. Generative-Adversarial-Network-Guided Well-Aware Placement for Analog Circuits
  17. 1- and 80-MS/s SAR ADCs in 40-nm CMOS With End-to-End Compilation
  18. Universal Symmetry Constraint Extraction for Analog and Mixed-Signal Circuits with Graph Neural Networks
  19. Toward Hardware-Efficient Optical Neural Networks: Beyond FFT Architecture via Joint Learnability
  20. MAGICAL: An Open- Source Fully Automated Analog IC Layout System from Netlist to GDSII
  21. Layout Symmetry Annotation for Analog Circuits with Graph Neural Networks
  22. Exploring Logic Optimizations with Reinforcement Learning and Graph Convolutional Network
  23. Effective analog/mixed-signal circuit placement considering system signal flow
  24. Toward silicon-proven detailed routing for analog and mixed-signal circuits
  25. An Efficient Training Framework for Reversible Neural Architectures