All Stories

  1. ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions
  2. Seeing Beyond the Order: a LEN5 to Sharpen Edge Microprocessors with Dynamic Scheduling
  3. Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA
  4. Implementation and integration of NTT/INTT accelerator on RISC-V for CRYSTALS-Kyber
  5. Implementation and integration of Keccak accelerator on RISC-V for CRYSTALS-Kyber
  6. Enabling Capsule Networks at the Edge through Approximate Softmax and Squash Operations
  7. HW-FlowQ: A Multi-Abstraction Level HW-CNN Co-design Quantization Methodology
  8. NASCaps
  9. Computation reduction for turbo decoding through window skipping