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  1. Space Mapping With Parameter Extraction Based on the Kullback-Leibler Distance Illustrated With Full-Wave EM and Equivalent Circuit Models for Microstrip Filters

    Article • IEEE Transactions on Microwave Theory and Techniques, November 2025, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  2. Cognitive Broyden-Based Input Space Mapping for Design Optimization

    Article • IEEE Microwave and Wireless Technology Letters, June 2025, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  3. TC-2 Design Automation Committee October 2022–November 2024 Technical Report [MTT-S Society News]

    Article • IEEE Microwave Magazine, June 2025, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  4. An Overview of the 5th IEEE MTT-S Latin America Microwave Conference [IEEE Radio & Wireless Week 2025]

    Article • IEEE Microwave Magazine, December 2024, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  5. Microwave Modeling and Design Optimization: The Legacy of John Bandler

    Article • IEEE Transactions on Microwave Theory and Techniques, January 2024, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  6. Promoting and Empowering the RF and Microwave Community in Costa Rica [MTT-S Society News]

    Article • IEEE Microwave Magazine, December 2023, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  7. An Overview of RF and Microwave Research in Latin America: Scanning Latin American Research on Microwaves

    Article • IEEE Microwave Magazine, May 2023, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  8. An Early History of Optimization Technology for Automated Design of Microwave Circuits

    Article • IEEE Journal of Microwaves, January 2023, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  9. Frequency- and Time-Domain Yield Optimization of a Power Delivery Network Subject to Large Decoupling Capacitor Tolerances

    Article • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, December 2022, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  10. The MTT-S Education Committee–Promoting Education for All–2022

    Article • IEEE Microwave Magazine, November 2022, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  11. Fast Jitter Tolerance Testing for High-Speed Serial Links in Post-Silicon Validation

    Article • IEEE Transactions on Electromagnetic Compatibility, April 2022, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  12. Advanced RF and Microwave Design Optimization: A Journey and a Vision of Future Trends

    Article • IEEE Journal of Microwaves, January 2021, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  13. Surrogate-Based Analysis and Design Optimization of Power Delivery Networks

    Article • IEEE Transactions on Electromagnetic Compatibility, December 2020, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  14. The Second IEEE MTT-S Latin America Microwave Conference [Conference Report]

    Article • IEEE Microwave Magazine, January 2020, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  15. Analog Gross Fault Identification in RF Circuits Using Neural Models and Constrained Parameter Extraction

    Article • IEEE Transactions on Microwave Theory and Techniques, June 2019, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  16. Post-Silicon Receiver Equalization Metamodeling by Artificial Neural Networks

    Article • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, April 2019, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  17. A tool for the automatic generation and analysis of regular analog layout modules

    Article • Integration, March 2019, Elsevier

    Dr. José Ernesto Rayas-Sánchez

  18. System Margining Surrogate-Based Optimization in Post-Silicon Validation

    Article • IEEE Transactions on Microwave Theory and Techniques, September 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  19. The First IEEE MTT-S Latin America Microwave Conference [Conference Report]

    Article • IEEE Microwave Magazine, September 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  20. A historical account and technical reassessment of the Broyden-based input space mapping optimization algorithm

    Article • June 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  21. A programmable CMOS voltage controlled ring oscillator for radio-frequency diathermy on-chip circuit

    Article • June 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  22. Design and validation of a portable radio-frequency diathermy prototype

    Article • June 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  23. Reconfigurable FIR filter coefficient optimization in post-silicon validation to improve eye diagram for optical interconnects

    Article • June 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  24. Analysis of the implications of stacked devices in nano-scale technologies for analog applications

    Article • March 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  25. Design of experiments implementation towards optimization of power distribution networks

    Article • February 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  26. A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation

    Article • IEEE Transactions on Emerging Topics in Computing, January 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  27. A holistic methodology for system margining and jitter tolerance optimization in post-silicon validation

    Article • December 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  28. Eye diagram optimization based on design of experiments (DoE) to accelerate industrial testing of high speed links

    Article • December 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  29. Multiphysics polynomial-based surrogate modeling of microwave structures in frequency domain

    Article • December 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  30. Temperature effects in automotive-grade high speed interconnects

    Article • December 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  31. Polynomial-Based Surrogate Modeling of RF and Microwave Circuits in Frequency Domain Exploiting the Multinomial Theorem

    Article • IEEE Transactions on Microwave Theory and Techniques, December 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  32. Synthesis tool for automatic layout generation of analog structures

    Article • October 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  33. Polynomial-based surrogate modeling of microwave structures in frequency domain exploiting the multinomial theorem

    Article • May 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  34. Power in Simplicity with ASM: Tracing the Aggressive Space Mapping Algorithm Over Two Decades of Development and Engineering Applications

    Article • IEEE Microwave Magazine, April 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  35. Space mapping optimization of handset antennas considering EM effects of mobile phone components and human body

    Article • International Journal of RF and Microwave Computer-Aided Engineering, October 2015, Wiley

    Dr. José Ernesto Rayas-Sánchez

  36. Optimization of full-wave EM models by low-order low-dimension polynomial surrogate functionals

    Article • International Journal of Numerical Modelling Electronic Networks Devices and Fields, September 2015, Wiley

    Dr. José Ernesto Rayas-Sánchez

  37. Enhanced formulation for polynomial-based surrogate modeling of microwave structures in frequency domain

    Article • August 2015, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  38. MTT-S Mexico Trip: Addressing the RF and Microwave Community in Mexico [Around the Globe]

    Article • IEEE Microwave Magazine, August 2015, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  39. Application of the NARX neural network as a digital predistortion technique for linearizing microwave power amplifiers

    Article • Microwave and Optical Technology Letters, June 2015, Wiley

    Dr J. R. Loo-Yau, Dr. José Ernesto Rayas-Sánchez

  40. Enhanced procedure to setup the simulation bounding box and the meshing scheme of a 3D finite element EM simulator for planar microwave structures

    Article • May 2015, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  41. Impedance matching analysis and EMC validation of a low-cost PCB differential interconnect

    Article • March 2015, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  42. A digital predistortion technique based on a NARX network to linearize GaN class F power amplifiers

    Article • August 2014, Institute of Electrical & Electronics Engineers (IEEE)

    Dr J. R. Loo-Yau, Dr. José Ernesto Rayas-Sánchez

  43. Research activities on computer-aided modeling, design and optimization of RF and microwave circuits at ITESO Mexico

    Article • June 2014, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  44. R&D in Latin America: RF and Microwave Research in Latin America

    Article • IEEE Microwave Magazine, May 2014, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez, Prof. Alfonso José Zozaya Sahad

  45. Return-loss minimization of package interconnects through input space mapping using FEM-based models

    Article • August 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  46. Neural Space Mapping Methods for Electromagnetics-Based Yield Estimation

    Article • March 2013, World Scientific Pub Co Pte Lt

    Dr. José Ernesto Rayas-Sánchez

  47. Systematic configuration of coarsely discretized 3D EM solvers for reliable and fast simulation of high-frequency planar structures

    Article • February 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  48. Artificial Neural Networks and Space Mapping for EM-Based Modeling and Design of Microwave Circuits

    Article • January 2013, Springer Science + Business Media

    Dr. José Ernesto Rayas-Sánchez

  49. Optimization of the stub-alternated and serpentine microstrip structures to minimize far-end crosstalk

    Article • October 2012, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  50. EM-based design optimization of microstrip lines traversing a rectangular gap in the reference plane

    Article • September 2012, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  51. On knowledge-based neural networks and neuro-space mapping

    Article • June 2012, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  52. HFSS automated driver based on non-GUI scripting for EM-based design of high-frequency circuits

    Article • February 2012, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  53. A linear regression inverse space mapping algorithm for EM-based design optimization of microwave circuits

    Article • June 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  54. Design optimization of microstrip lines with via fences through surrogate modeling based on polynomial functional interpolants

    Article • October 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  55. Impact of Base Points Distributions on the Polynomial Surrogate Modeling of a Substrate Integrated Waveguide with Microstrip Transitions

    Article • September 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  56. Neural input space mapping optimization based on nonlinear two-layer perceptrons with optimized nonlinearity

    Article • International Journal of RF and Microwave Computer-Aided Engineering, July 2010, Wiley

    Dr. José Ernesto Rayas-Sánchez

  57. Surrogate modeling of microwave circuits using polynomial functional interpolants

    Article • May 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  58. Design of a CMOS second order band-pass continuous time filter using numerical optimization

    Article • August 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  59. Design of reusable CMOS OTAs using CAD tools

    Article • August 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  60. EM-based optimization of a single layer SIW with microstrip transitions using linear output space mapping

    Article • June 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  61. An Improved EM-Based Design Procedure for Single-Layer Substrate Integrated Waveguide Interconnects with Microstrip Transitions

    Article • February 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  62. Foreword

    Article • January 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  63. Tuning-aided implicit space mapping

    Article • International Journal of RF and Microwave Computer-Aided Engineering, September 2008, Wiley

    Dr. José Ernesto Rayas-Sánchez

  64. A general EM-based design procedure for single-layer substrate integrated waveguide interconnects with microstrip transitions

    Article • June 2008, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  65. EM-Based Space Mapping Optimization of Left-handed Coplanar Waveguide Filters with Split Ring Resonators

    Article • June 2007, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  66. EM-Based Monte Carlo Analysis and Yield Prediction of Microwave Circuits Using Linear-Input Neural-Output Space Mapping

    Article • IEEE Transactions on Microwave Theory and Techniques, December 2006, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  67. Conference session

    Article • June 2006, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  68. EM-Based Statistical Analysis and Yield Estimation Using Linear-Input and Neural-Output Space Mapping

    Article • January 2006, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  69. A linear inverse space-mapping (LISM) algorithm to design linear and nonlinear RF and microwave circuits

    Article • IEEE Transactions on Microwave Theory and Techniques, March 2005, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  70. A practical and reliable method to simulate and minimize crosstalk between high-speed interconnects.

    Article • Microelectronics Reliability, April 2004, Elsevier

    Dr. José Ernesto Rayas-Sánchez

  71. EM-Based Optimization of Microwave Circuits Using Artificial Neural Networks: The State-of-the-Art

    Article • IEEE Transactions on Microwave Theory and Techniques, January 2004, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  72. Neural inverse space mapping (NISM) optimization for EM-based microwave design

    Article • International Journal of RF and Microwave Computer-Aided Engineering, February 2003, Wiley

    Dr. José Ernesto Rayas-Sánchez

  73. Expanded space-mapping EM-based design framework exploiting preassigned parameters

    Article • IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications, December 2002, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  74. Yield-driven electromagnetic optimization via space mapping-based neuromodels

    Article • International Journal of RF and Microwave Computer-Aided Engineering, December 2001, Wiley

    Dr. José Ernesto Rayas-Sánchez

  75. Yield-Driven EM Optimization using Space Mapping-Based Neuromodels

    Article • October 2001, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  76. Broadband physics-based modeling of microwave passive devices through frequency mapping

    Article • International Journal of RF and Microwave Computer-Aided Engineering, April 2001, Wiley

    Dr. José Ernesto Rayas-Sánchez

  77. A generalized space-mapping tableau approach to device modeling

    Article • IEEE Transactions on Microwave Theory and Techniques, January 2001, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  78. Neural space-mapping optimization for EM-based design

    Article • IEEE Transactions on Microwave Theory and Techniques, January 2000, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  79. Space-mapping optimization of microwave circuits exploiting surrogate models

    Article • IEEE Transactions on Microwave Theory and Techniques, January 2000, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  80. A Generalized Space Mapping Tableau Approach to Device Modeling

    Article • October 1999, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez

  81. Neuromodeling of microwave circuits exploiting space-mapping technology

    Article • IEEE Transactions on Microwave Theory and Techniques, January 1999, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. José Ernesto Rayas-Sánchez