All Stories

  1. Pipelined median architecture

    Article • Electronics Letters, November 2015, the Institution of Engineering and Technology (the IET)

    Dr Jose O Cadenas

  2. Virtualization for Cost-Effective Teaching of Assembly Language Programming

    Article • IEEE Transactions on Education, November 2015, Institute of Electrical & Electronics Engineers (IEEE)

    Dr Jose O Cadenas

  3. Median Filter Architecture by Accumulative Parallel Counters

    Article • IEEE Transactions on Circuits & Systems II Express Briefs, July 2015, Institute of Electrical & Electronics Engineers (IEEE)

    Dr Jose O Cadenas

  4. Rapid preconditioning of data for accelerating convex hull computations

    Article • Electronics Letters, February 2014, the Institution of Engineering and Technology (the IET)

    Dr Jose O Cadenas

  5. A Parallel Quantum Histogram Architecture

    Article • IEEE Transactions on Circuits & Systems II Express Briefs, July 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Dr Jose O Cadenas

  6. C-slow retimed parallel histogram architectures for consumer imaging devices

    Article • IEEE Transactions on Consumer Electronics, May 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Dr Jose O Cadenas

  7. Fast median calculation method

    Article • Electronics Letters, January 2012, the Institution of Engineering and Technology (the IET)

    Dr Jose O Cadenas

  8. Parallel pipelined array architectures for real-time histogram computation in consumer devices

    Article • IEEE Transactions on Consumer Electronics, November 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Dr Jose O Cadenas

  9. Parallel pipelined histogram architectures

    Article • Electronics Letters, January 2011, the Institution of Engineering and Technology (the IET)

    Dr Jose O Cadenas

  10. A double data rate architecture for OFDM based wireless consumer devices

    Article • IEEE Transactions on Consumer Electronics, February 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Dr Jose O Cadenas