All Stories

  1. Challenges in Floorplanning and Macro Placement for Modern SoCs

    Article • March 2024, ACM (Association for Computing Machinery)

    Dr I-Lun Tseng

  2. Flexible chip placement via reinforcement learning

    Article • July 2022, ACM (Association for Computing Machinery)

    Dr I-Lun Tseng

  3. An automated system for checking process friendliness and routability of standard cells

    Article • March 2020, SPIE

    Dr I-Lun Tseng

  4. A System for Standard Cell Routability Checking and Placement Routability Improvements

    Article • November 2019, Institute of Electrical & Electronics Engineers (IEEE)

    Dr I-Lun Tseng

  5. CAPP: context analyzer and printability predictor

    Article • March 2019, SPIE

    Dr I-Lun Tseng

  6. An Automated System for Checking Lithography Friendliness of Standard Cells

    Article • October 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Dr I-Lun Tseng

  7. Range pattern matching with layer operations and continuous refinements

    Article • March 2018, SPIE

    Dr I-Lun Tseng

  8. A parallel dual-scanline algorithm for partitioning parameterized 45-degree polygons

    Article • ACM Transactions on Design Automation of Electronic Systems, October 2013, ACM (Association for Computing Machinery)

    Dr I-Lun Tseng

  9. Boolean mask operations on parameterized 45-degree polygons

    Article • August 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Dr I-Lun Tseng

  10. Fast partitioning of parameterized 45-degree polygons into parameterized trapezoids

    Article • June 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Dr I-Lun Tseng

  11. Procedural module generation for parameterized layouts

    Article • April 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Dr I-Lun Tseng

  12. Relocatable and resizable SRAM synthesis for via configurable structured ASIC

    Article • March 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Dr I-Lun Tseng

  13. Design and representation of parameterized layouts for octagonal spiral inductors

    Article • February 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Dr I-Lun Tseng

  14. Obstacle-Aware Longest-Path Routing with Constraint Programming and Parallel MILP

    Article • January 2011, American Institute of Physics

    Dr I-Lun Tseng

  15. Efficient partitioning of parameterized 45-degree polygons with mixed ILP

    Article • November 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Dr I-Lun Tseng

  16. Obstacle-Avoiding Switchbox Routing with CP and Parallel MILP

    Article • November 2010, Global Science & Technology Forum

    Dr I-Lun Tseng

  17. Partitioning parameterized 45-degree polygons with constraint programming

    Article • ACM Transactions on Design Automation of Electronic Systems, July 2008, ACM (Association for Computing Machinery)

    Dr I-Lun Tseng

  18. An efficient algorithm for partitioning parameterized polygons into rectangles

    Article • January 2006, ACM (Association for Computing Machinery)

    Dr I-Lun Tseng