All Stories

  1. A 84 dB DC-Gain Two-Stage Class-AB OTA
  2. A Placement and Routing Method for Analog Layout Generation Using Modified Cuckoo Optimization Algorithm
  3. Positive Feedback Technique and Split-Length Transistors for DC-Gain Enhancement of Two Stage Op-Amps
  4. Automatic Design and Yield Enhancement of Data Converters
  5. Yield-aware sizing of pipeline ADC using a multiple-objective evolutionary algorithm
  6. Two-stage class-AB OTA with enhanced DC gain and slew rate
  7. Fully differential charge-pump comparator-based pipelined ADC in 90nm CMOS
  8. Modified dual band gysel power divider with isolation bandwidth improvement
  9. Linear doherty power amplifier with enhanced back-off efficiency mode for LTE applications
  10. Digital Calibration of DAC Unit Elements Mismatch in Pipelined ADCs
  11. A statistics-based digital background calibration technique for pipelined ADCs
  12. Overshoot cancelation of residue voltage in fully differential comparator-based pipelined ADC
  13. Ultra-low-power front-end CMOS true logarithmic amplifier for biopotential signal acquisition applications
  14. Combination of DAC switches and SAR logics in a 720 MS/s low-bit successive approximation ADC
  15. A reduced-sample-rate 2–2–0 MASH-delta-sigma-pipeline ADC architecture
  16. A Low-Collision CSMA-Based Active RFID for Tracking Applications
  17. On the design of a low-voltage two-stage OTA using bulk-driven and positive feedback techniques
  18. Positive feedback technique for DC-gain enhancement of folded cascode Op-Amps
  19. A 3-ppm/°C bandgap voltage reference using MOSFETs in strong inversion region
  20. Design and Implementation of a Low-Power Active RFID for Container Tracking at 2.4 GHz Frequency
  21. A new two-stage Op-Amp using gate-driven, and positive feedback techniques
  22. A 109dB PSRR, 31µW fully-MOSFET bandgap voltage reference in 0.13µm CMOS technology
  23. A new method for enhancement of the noisy speech with low SNR
  24. A new two-stage Op-Amp using hybrid cascode compensation, bulk-driven, and positive feedback techniques
  25. A 5-GHZ VCO for WLAN applications
  26. Design of a robust NTF for continuous-time ΔΣ modulators
  27. A High PSRR Bandgap Voltage Reference with Virtually Diode-Connected MOS Transistors
  28. A New Method for Low SNR Estimation of Noisy Speech Signals Using Fourth-Order Moments
  29. A programmable true piecewise approximation logarithmic amplifier
  30. Robust NTF design for continuous time Sigma-Delta modulators
  31. A 0.9-V programmable true piecewise approximation logarithmic amplifier in 0.13µm CMOS technology
  32. Analysis and design of a 3–5 GHZ ultra-wideband CMOS low-noise amplifier
  33. A new perceptually weighted distance measure for vector quantization of the STFT amplitudes in the speech application
  34. Digital-tuning of RC time constant in Multi-Bit continuous-time Delta-Sigma modulators
  35. Less jitter sensitive NTF design for NRZ multi-bit continuous-time Delta-Sigma modulators
  36. Continuous Time Delta-Sigma Modulators with Arbitrary DAC Waveforms
  37. Return to-zero feedback insertion in a continuous time Delta-Sigma modulator for excess loop delay compensation