All Stories

  1. A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms
  2. A Synthesis Methodology for Intelligent Memory Interfaces in Accelerator Systems
  3. SPARTA: High-Level Synthesis of Parallel Multi-Threaded Accelerators
  4. Extending High-Level Synthesis with AI/ML Methods
  5. High-level synthesis for complex applications: the Bambu approach
  6. A DNN-based Background Segmentation Accelerator for FPGA-equipped satellites
  7. High-Level Synthesis of the OpenMP runtime to improve the generation of parallel accelerators
  8. Exploration of Synthesis Methods from Simulink Models to FPGA for Aerospace Applications
  9. MLIR Loop Optimizations for High-Level Synthesis
  10. Hardware acceleration of complex machine learning models through modern high-level synthesis
  11. Automated Bug Detection for High-level Synthesis of Multi-threaded Irregular Applications
  12. Using Efficient Path Profiling to Optimize Memory Consumption of On-Chip Debugging for High-Level Synthesis
  13. Efficient synthesis of graph methods