All Stories

  1. A Highly Efficient 165-GHz 4FSK 17-Gb/s Transceiver System With Frequency Overlapping Architecture in 65-nm CMOS

    Article • IEEE Journal of Solid-State Circuits, November 2023, Institute of Electrical & Electronics Engineers (IEEE)

    Mr. Cheng Li

  2. A 17 Gb/s 10.7 pJ/b 4FSK Transceiver System for Point to Point Communication in 65 nm CMOS

    Article • June 2022, Institute of Electrical & Electronics Engineers (IEEE)

    Mr. Cheng Li

  3. Missing-Code-Occurrence Probability Calibration Technique for DAC Nonlinearity With Supply and Reference Circuit Analysis in a SAR ADC

    Article • IEEE Transactions on Circuits and Systems I Regular Papers, November 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Mr. Cheng Li

  4. A 0.19 mm² 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS

    Article • IEEE Transactions on Circuits and Systems I Regular Papers, January 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Mr. Cheng Li

  5. Analysis of Reference Error in High-Speed SAR ADCs With Capacitive DAC

    Article • IEEE Transactions on Circuits and Systems I Regular Papers, January 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Mr. Cheng Li

  6. 60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration

    Article • IEEE Journal of Solid-State Circuits, October 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Mr. Cheng Li

  7. A 312 ps response-time LDO with enhanced super source follower in 28 nm CMOS

    Article • Electronics Letters, August 2016, the Institution of Engineering and Technology (the IET)

    Dr Mo Huang, Mr. Cheng Li