All Stories

  1. CoddSpeed: Hardware Accelerated Query Processing in Microsoft Fabric
  2. AI-Assisted Copilot Automation for Reliable FPGA Verification at Hyperscale
  3. Hyperscale FPGA Engineering Systems at Microsoft
  4. What To Do With Datacenter FPGAs Besides Deep Learning
  5. Introduction to MPP 2019
  6. Introduction to MPP 2018
  7. KV-Direct
  8. FPGAs in the Datacenter
  9. A Cloud-Scale Acceleration Architecture
  10. Configurable Clouds
  11. A reconfigurable fabric for accelerating large-scale datacenter services
  12. Message from the MPP 2016 Workshop Chairs
  13. A cloud-scale acceleration architecture
  14. A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services
  15. Accelerating Homomorphic Evaluation on Reconfigurable Hardware
  16. Large-scale reconfigurable computing in a microsoft datacenter
  17. A reconfigurable fabric for accelerating large-scale datacenter services
  18. Inspection-Resistant Memory Architectures
  19. How to implement effective prediction and forwarding for fusable dynamic multicore architectures
  20. Inspection resistant memory
  21. Inspection resistant memory: Architectural support for security from physical examination
  22. MPI as a Programming Model for High-Performance Reconfigurable Computers
  23. Performance and power of cache-based reconfigurable computing
  24. MPI as an abstraction for software-hardware interaction for HPRCs
  25. CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures
  26. The WaveScalar architecture
  27. Instruction scheduling for a tiled dataflow architecture
  28. Area-Performance Trade-offs in Tiled Dataflow Architectures
  29. Instruction scheduling for a tiled dataflow architecture
  30. Modeling instruction placement on a spatial architecture
  31. Reducing control overhead in dataflow architectures