All Stories

  1. End-to-end security scheme for mobility enabled healthcare Internet of Things
  2. Special issue on energy efficient multi-core and many-core systems, Part I
  3. Internet of things for remote elderly monitoring: a study from user-centered perspective
  4. IoT-based remote facial expression monitoring system with sEMG signal
  5. LISA 2.0: lightweight internet of things service bus architecture using node centric networking
  6. A Power-Aware Approach for Online Test Scheduling in Many-Core Architectures
  7. A Lifetime-Aware Runtime Mapping Approach for Many-core Systems in the Dark Silicon Era
  8. Reliability-Aware Runtime Power Management for Many-Core Systems in the Dark Silicon Era
  9. Dark silicon aware runtime mapping for many-core systems: A patterning approach
  10. Adaptive fault simulation on many-core microprocessor systems
  11. Facial Expression Recognition with sEMG Method
  12. Software-based on-chip thermal sensor calibration for DVFS-enabled many-core systems
  13. Fog Computing in Healthcare Internet of Things: A Case Study on ECG Feature Extraction
  14. Session Resumption-Based End-to-End Security for Healthcare Internet-of-Things
  15. MapPro
  16. Predictable Application Mapping for Manycore Real-Time and Cyber-Physical Systems
  17. Accelerated On-chip Communication Test Methodology Using a Novel High-Level Fault Model
  18. Dynamic power management for many-core platforms in the dark silicon era: A multi-objective control approach
  19. Energy efficient 3D Hybrid processor-memory architecture for the dark silicon age
  20. Fault tolerant and scalable IoT-based architecture for health monitoring
  21. PhonoSys: Mobile Phonocardiography Diagnostic System for Newborns
  22. Power-Aware Online Testing of Manycore Systems in the Dark Silicon Era
  23. LISA: Lightweight Internet of Things Service Bus Architecture
  24. Internet of Things Enabled In-Home Health Monitoring System Using Early Warning Score
  25. SEA: A Secure and Efficient Authentication and Authorization Architecture for IoT-Based Healthcare Using Smart Gateways
  26. Web-Enabled Intelligent Gateways for eHealth Internet-of-Things
  27. Smart e-Health Gateway: Bringing intelligence to Internet-of-Things based ubiquitous healthcare systems
  28. Dark silicon aware power management for manycore systems under dynamic workloads
  29. Automated formal approach for debugging dividers using dynamic specification
  30. Customizing 6LoWPAN networks towards Internet-of-Things based ubiquitous healthcare systems
  31. Energy-efficient concurrent testing approach for many-core systems in the dark silicon age
  32. Special section on advances in methods for adaptive multicore systems
  33. Online testing of many-core systems in the Dark Silicon era
  34. A task migration mechanism for distributed many-core operating systems
  35. Mixed-Criticality Run-Time Task Mapping for NoC-Based Many-Core Systems
  36. Towards Energy-Efficient HealthCare: an Internet-of-Things Architecture Using Intelligent Gateways
  37. Pervasive Health Monitoring Based on Internet of Things: Two Case Studies
  38. Design space exploration of thermal-aware many-core systems
  39. A multicore approach to model-based analysis and design of Cyber-Physical Systems
  40. Design and implementation of reconfigurable FIFOs for Voltage/Frequency Island-based Networks-on-Chip
  41. Partial Virtual Channel Sharing: A Generic Methodology to Enhance Resource Management and Fault Tolerance in Networks-on-Chip
  42. Developing a power-efficient and low-cost 3D NoC using smart GALS-based vertical channels
  43. An efficient implementation of Hamiltonian path based multicast routing for 3D interconnection networks
  44. Enhancing Performance of 3D Interconnection Networks using Efficient Multicast Communication Protocol
  45. Cluster Based Networks-on-Chip:
  46. An efficient history-based routing algorithm for interconnection networks
  47. Partial-LastZ: An optimized hybridization technique for 3D NoC architecture enabling adaptive inter-layer communication
  48. Designing a High Performance and Reliable Networks-on-Chip Using Network Interface Assisted Routing Strategy
  49. Power and Thermal Analysis of Stacked Mesh 3D NoC Using AdaptiveXYZ Routing Algorithm
  50. Exploring a Low-Cost and Power-Efficient Hybridization Technique for 3D NoC-Bus Hybrid Architecture Using LastZ-Based Routing Algorithms
  51. A Cluster-Based Core Protection Technique for Networks-on-Chip
  52. Generic Monitoring and Management Infrastructure for 3D NoC-Bus Hybrid Architectures
  53. A self-test and self-repair approach for analog integrated circuits
  54. An Efficient Hybridization Scheme for Stacked Mesh 3D NoC Architecture
  55. Design of a Reliable XOR-XNOR Circuit for Arithmetic Logic Units
  56. Thermal modeling and analysis of advanced 3D stacked structures
  57. ARB-NET: A novel adaptive monitoring platform for stacked mesh 3D NoC architectures
  58. Design and management of high-performance, reliable and thermal-aware 3D networks-on-chip
  59. An Autonomic NoC Architecture Using Heuristic Technique for
  60. A low-cost processing element recovery mechanism for fault tolerant Networks-on-Chip
  61. A Novel Topology-Independent Router Architecture to Enhance Reliability and Performance of Networks-on-Chip
  62. LastZ: An Ultra Optimized 3D Networks-on-Chip Architecture
  63. Thermal Analysis of Job Allocation and Scheduling Schemes for 3D Stacked NoC's
  64. Enhancing Performance Sustainability of Fault Tolerant Routing Algorithms in NoC-Based Architectures
  65. Thermal Analysis of Advanced 3D Stacked Systems
  66. Power-Efficient Inter-Layer Communication Architectures for 3D NoC
  67. Enhancing Performance of NoC-Based Architectures Using Heuristic Virtual-Channel Sharing Approach
  68. A Stacked Mesh 3D NoC Architecture Enabling Congestion-Aware and Reliable Inter-layer Communication
  69. PVS-NoC: Partial Virtual Channel Sharing NoC Architecture
  70. Congestion aware, fault tolerant, and thermally efficient inter-layer communication scheme for hybrid NoC-bus 3D architectures
  71. Power and Area Optimization of 3D Networks-on-Chip Using Smart and Efficient Vertical Channels
  72. Power- and performance-aware IP mapping for NoC-based MPSoC platforms
  73. An efficient VFI-based NoC architecture using Johnson-encoded Reconfigurable FIFOs
  74. Research and practices on 3D networks-on-chip architectures
  75. Exploring a low-cost inter-layer communication scheme for 3D networks-on-chip
  76. BBVC-3D-NoC: An Efficient 3D NoC Architecture Using Bidirectional Bisynchronous Vertical Channels
  77. Power and performance optimization of voltage/frequency island-based networks-on-chip using reconfigurable synchronous/bi-synchronous FIFOs
  78. Power-aware NoC router using central forecasting-based dynamic virtual channel allocation
  79. Developing reconfigurable FIFOs to optimize power/performance of Voltage/Frequency Island-based networks-on-chip
  80. Forecasting-Based Dynamic Virtual Channel Management for Power Reduction in Network-on-Chips
  81. A Novel Synthetic Traffic Pattern for Power/Performance Analysis of Network-on-Chips Using Negative Exponential Distribution
  82. Negative Exponential Distribution Traffic Pattern for Power/Performance Analysis of Network on Chips
  83. Forecasting-Based Dynamic Virtual Channels Allocation for Power Optimization of Network-on-Chips
  84. Power efficient switches with dynamic virtual channel allocation for network-on-chips
  85. A novel test environment for template based QDI asynchronous circuits
  86. An Efficient Fault Simulator for QDI Asynchronous Circuits
  87. Stall Power Reduction in Pipelined Architecture Processors