All Stories

  1. A Signal Quality Assessment Algorithm for Photoplethysmographic Sensors: Extended Version
  2. Self‐Timed Asynchronous RISC‐V Microprocessor for Contactless Cards
  3. A 3-bit Digitally-Reconfigurable Driving-Capability nW-Powered Three-Stage Fully-Synthesizable Inverter-Based OTA for Multi-Load/Applications
  4. Area-Efficient Low-Power Self-Biased Three-Stage OTA Fabricated in 0.6- μ m IGZO-on-Plastic Technology
  5. Capacitance Distribution in Charge Pumps With Capacitive Load to Reduce Area and Input Energy
  6. Sub- μ W Battery-Less and Oscillator-Less Wi-Fi Backscattering Transmitter Reusing RF Signal for Harvesting, Communications, and Motion Detection
  7. 46-nA High-PSR CMOS Buffered Voltage Reference With 1.2–5 V and −40 ◦C to 125 ◦C Operating Range
  8. A Low‐Power GaN Shift Register in GaN Monolithic Technology
  9. Two-Stage Inverter-Based OTA With 56-dB Gain and Digitally Reconfigurable GBW/SR for PVT-Resiliency
  10. 0.35-V SR-Enhanced Bulk-Driven OTA for Loads up to 10 nF
  11. A Current-Efficient Pseudo-3D Regulated Dickson Charge Pump
  12. Offset Compensation for Differential Charge-Based Capacitance Measurement
  13. Offset compensation for differential charge‐based capacitance measurement
  14. A 15-nA quiescent current capacitor-less LDO for sub-1V μW-powered fully-harvested systems
  15. Multi-Electrode EMG Spatial-Filter Implementation Based on Current Conveyors
  16. 0.6-V, μW-Power Four-Stage OTA With Minimal Components, and 100× Load Range
  17. A High Efficiency and High Power Density Active AC/DC Converter for Battery-Less US-Powered IMDs in a 28-nm CMOS Technology
  18. Hybrid Cascode Compensation With Hybrid Q-Factor Control for Three-Stage Unconditionally Stable Amplifiers
  19. High-Performance Integrated Charge Pumps
  20. GBW Optimization in Two-Stage OTAs Operating in Weak Inversion
  21. A Novel Digital OTA Topology With 66-dB DC Gain and 12.3-kHz Bandwidth
  22. Hybrid Cascode Frequency Compensation for Four-Stage OTAs Driving a Wide Range of C L
  23. A Survey of Ultra-Low-Power Amplifiers for Internet of Things Nodes
  24. A 0.3-V 8.5-μ a Bulk-Driven OTA
  25. Active and passive rectification methods for US-powered IMDs
  26. A compensation scheme for three-stage OTAs with no Miller capacitors
  27. An Energy-Efficient Design Strategy for Dickson Charge Pumps with Linear Distributed Capacitance
  28. Triple Clock Boosted Voltage Multiplier: A Design Strategy to Heavily Reduce Rise Time
  29. Very-Low-Voltage Charge Pump Topologies for IoT Applications
  30. A 28-nm, 0.5-V, 78.5-nA Switched Capacitor Current Reference with Active Trimming for sub-1V Implantable Medical Devices
  31. Fully On-Chip Charge Pump-based Boost Converter in 65-nm CMOS for Single Solar Cell Powered IC
  32. A 0.6 V Bulk-Driven Class-AB Two-Stage OTA with Non-Tailed Differential Pair
  33. 300-mV Bulk-Driven Three-Stage OTA in 65-nm CMOS
  34. Demystifying Regulating Active Rectifiers for Energy Harvesting Systems: A Tutorial Assisted by Verilog-A Models
  35. A Bulk Current Regulation Technique for Dual-Branch Cross-Coupled Charge Pumps
  36. The Dickson Charge Pump as a Signal Amplifier
  37. 0.4-V, 81.3-nA Bulk-Driven Single-Stage CMOS OTA with Enhanced Transconductance
  38. A Design Procedure for Sizing Comparators in Active Rectifiers using $g_{m}/I_{D}$ Technique
  39. Signal Amplification by Means of a Dickson Charge Pump: Analysis and Experimental Validation
  40. Two-Stage OTA With All Subthreshold MOSFETs and Optimum GBW to DC-Current Ratio
  41. A 0.63 pJ/bit Fully-Digital BPSK Demodulator for US-powered IMDs downlink in a 28-nm bulk CMOS technology
  42. Planar Capacitive Transducers for a Miniaturized Particulate Matter Detector
  43. A 28 nm Bulk CMOS Fully Digital BPSK Demodulator for US-Powered IMDs Downlink Communications
  44. Single miller capacitor frequency compensation techniques: Theoretical comparison and critical review
  45. A 6.3-ppm/°C, 100-nA Current Reference With Active Trimming in 28-nm Bulk CMOS Technology
  46. A Charge Loss Aware Advanced Model of Dickson Voltage Multipliers
  47. A Methodology to Derive a Symbolic Transfer Function for Multistage Amplifiers
  48. An Unconditionally Stable Three-Stage OTA
  49. Double-Differential Amplifier for sEMG Measurement by Means of a Current-Mode Approach
  50. Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range
  51. 28-nm CMOS Resistor-Less Voltage Reference with Process Corner Compensation
  52. An Efficient AC-DC Converter in 28nm Si-Bulk CMOS Technology for Piezo-Powered Medical Implanted Devices
  53. Charge Pumps for Ultra-Low-Power Applications: Analysis, Design, and New Solutions
  54. An Automatic Offset Calibration Method for Differential Charge-Based Capacitance Measurement
  55. A Review of Power Management Integrated Circuits for Ultrasound-Based Energy Harvesting in Implantable Medical Devices
  56. A Time-Based Electronic Front-End for a Capacitive Particle Matter Detector
  57. Power Efficiency Improvement of a Boost Converter Using a Coupled Inductor with a Fuzzy Logic Controller: Application to a Photovoltaic System
  58. A Memory-Targeted Dynamic Reconfigurable Charge Pump to Achieve a Power Consumption Reduction in IoT Nodes
  59. Charge Pump Improvement for Energy Harvesting Applications by Node Pre-Charging
  60. High-Frequency Low-Current Second-Order Bandpass Active Filter Topology and Its Design in 28-nm FD-SOI CMOS
  61. Current‐mode body‐biased switch to increase performance of linear charge pumps
  62. A High-Performance Charge Pump Topology for Very-Low-Voltage Applications
  63. Regulated Charge Pumps: A Comparative Study by Means of Verilog-AMS
  64. Linear distribution of capacitance in Dickson charge pumps to reduce rise time
  65. Global impedance attenuation network for multistage OTAs driving a broad range of load capacitor
  66. A Subthreshold Cross-Coupled Hybrid Charge Pump for 50-mV Cold-Start
  67. Sub-Femto-Farad Resolution Electronic Interfaces for Integrated Capacitive Sensors: A Review
  68. Optimized Charge Pump With Clock Booster for Reduced Rise Time or Silicon Area
  69. A simple and effective design strategy to increase power conversion efficiency of linear charge pumps
  70. Active load with cross‐coupled bulk for high‐gain high‐CMRR nanometer CMOS differential stages
  71. Description and performance analysis of a flexible photovoltaic/thermal (PV/T) solar system
  72. Autonomous Energy-Efficient Wireless Sensor Network Platform for Home/Office Automation
  73. A Review of Charge Pump Topologies for the Power Management of IoT Nodes
  74. Dual Push–Pull High-Speed Rail-to-Rail CMOS Buffer Amplifier for Flat-Panel Displays
  75. High-Performance Three-Stage Single-Miller CMOS OTA With No Upper Limit of ${C}_{L}$
  76. Switched-Capacitor Power Management Integrated Circuit for Autonomous Internet of Things Node
  77. Three-stage single-miller CMOS OTA driving 10 nF with 1.46-MHz GBW
  78. Area-optimized sub-fF offset trimming circuit for capacitive MEMS interfaces
  79. Novel straightforward and effective extraction methodology for SiPM model parameters
  80. 0.9-V Class-AB Miller OTA in 0.35- $\mu \text{m}$ CMOS With Threshold-Lowered Non-Tailed Differential Pair
  81. A toolbox for the symbolic analysis and simulation of linear analog circuits
  82. A 0.003-mm2 50-mW three-stage amplifier driving 10-nF with 2.7-MHz GBW
  83. Enhanced analytical model and output dynamic response of SiPM-Based electronic read-outs
  84. 0.7-V Three-Stage Class-AB CMOS Operational Transconductance Amplifier
  85. The noise performance of CMOS Miller operational transconductance amplifiers with embedded current-buffer frequency compensation
  86. Optimized Active Single-Miller Capacitor Compensation With Inner Half-Feedforward Stage for Very High-Load Three-Stage OTAs
  87. Improved single-miller passive compensation network for three-stage CMOS OTAs
  88. 195-nW 120-dB subthreshold CMOS OTA driving up to 200 pF and occupying only 4.4–10−3 mm2
  89. CMOS Non-tailed differential pair
  90. Hardware solution for increasing the efficiency of PV module under mismatch operation
  91. High-Performance Four-Stage CMOS OTA Suitable for Large Capacitive Loads
  92. Single-miller all-passive compensation network for three-stage OTAs
  93. Monitoring of solar cogenerative PVT power plants: Overview and a practical example
  94. 0.7-V bulk-driven three-stage class-AB OTA
  95. A new enhanced PSPICE implementation of the equivalent circuit model of SiPM detectors
  96. Design Methodology of Subthreshold Three-Stage CMOS OTAs Suitable for Ultra-Low-Power Low-Area and High Driving Capability
  97. Symbolic factorization methodology for multistage amplifier transfer functions
  98. Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes
  99. A new accurate analytical expression for the SiPM transient response to single photons
  100. High-performance frequency compensation topology for four-stage OTAs
  101. Monolithic quenching-and-reset circuit for single-photon avalanche diodes
  102. Self-Biased Dual-Path Push-Pull Output Buffer Amplifier for LCD Column Drivers
  103. Remote monitoring system for stand-alone photovoltaic power plants: The case study of a PV-powered outdoor refrigerator
  104. Micro-scale inductorless maximum power point tracking DC–DC converter
  105. Analytical comparison of reversed nested Miller frequency compensation techniques
  106. Analysis and Implementation of a Minimum-Supply Body-Biased CMOS Differential Amplifier Cell
  107. Comparison of the Frequency Compensation Techniques for CMOS Two-Stage Miller OTAs
  108. Single Miller capacitor frequency compensation with nulling resistor for three-stage amplifiers
  109. A 2.5-GHz DDFS-PLL With 1.8-MHz Bandwidth in 0.35-$\mu$m CMOS
  110. A novel MPPT charge regulator for a photovoltaic stand-alone telecommunication system
  111. An advanced SOC model for a stand-alone telecommunication system
  112. Optimal energy management of a photovoltaic stand-alone dual battery system
  113. Analytical comparison of frequency compensation techniques in three-stage amplifiers
  114. CMOS current-steering DAC architectures based on the triple-tail cell
  115. Two CMOS Current Feedback Operational Amplifiers
  116. CMOS High-CMRR Current Output Stages
  117. CMOS Miller OTA with Body-Biased Output Stage
  118. CMOS voltage feedback current amplifier
  119. Single Miller capacitor frequency compensation with nulling resistor for three-stage amplifiers
  120. Advances in Reversed Nested Miller Compensation
  121. Improved Reversed Nested Miller Frequency Compensation Technique With Voltage Buffer and Resistor
  122. Design Procedures for Three-Stage CMOS OTAs With Nested-Miller Compensation
  123. High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier
  124. Three-Stage CMOS OTA for Large Capacitive Loads With Efficient Frequency Compensation Scheme
  125. Design of cascaded ECL gates with power constraint
  126. Optimised design of ECL gates with power constraint
  127. CMOS class AB single-to-differential transconductor
  128. Current-steering D/A converter based on triple tail cell
  129. High-Performance CMOS Pseudo-Differential Amplifier
  130. Optimized design of ECL gates with a power constraint